Chipidea claims lowest power USB PHY

Permalink: Chipidea claims lowest power USB PHY

Chipidea has developed a USB physical layer architecture using 1.8V IO devices which it believes provides the lowest power consumption for system-on-chip (SoC) designs in the 65nm and 45nm process technologies.

The USB IP supports designs with a power consumption of approximately 70mW.

The 1.8V platform provides a new IO device choice with the advantages of analogue programmability, built-in self-test (BIST) and full compliance with the USB2.0 specification.

Chipidea’s 1.8V USB PHY also provides D+ and D- protection to withstand transient short-circuit voltage without damage.

The core features analogue programmability for fine-tuning.